EP2AGZ300FF35C4N vs EP2AGZ300FF35I3G 比較
詳細並排比較 EP2AGZ300FF35C4N 由 Altera 與 EP2AGZ300FF35I3G 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2AGZ300FF35C4N | EP2AGZ300FF35I3G |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Series | Arria II GZ | — |
| Logic Elements | 298,000 | — |
| Logic Array Blocks (LABs) | 11,920 | — |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | — |
| Core Voltage | 0.9 V | — |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | — |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | — |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | [DATA_NEEDED: number of DSP blocks] |
| PLLs | [DATA_NEEDED: PLL count] | [DATA_NEEDED: number of PLLs] |
| RoHS 狀態 | Compliant (per Besenchips / DigiKey listing) | Compliant |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Maximum Operating Frequency | 500 MHz | — |
| Family | — | Arria II GZ |
| Logic Elements (LE) | — | 300000 |
| Number of User I/O | — | 554 (maximum) |
| Number of Transceivers | — | 8 |
| Transceiver Data Rate | — | Up to 6.375 Gbps |
| Process Node | — | 40 nm |
| 工作溫度 | — | -40C to +100 C (I3 industrial) |
| 封裝 | — | 1152-ball FBGA (FF35) |
| 供應電壓 | — | [DATA_NEEDED: core and I/O supply voltage values] |
| Embedded Memory (Mbits) | — | 16.4 |
| Memory Interfaces | — | DDR3, QDRII+, RLDRAM II |
| Configuration Method | — | Serial, Parallel, JTAG |
| MSL 等級 | — | 3 (168 hours) |
| Lead-Free | — | Yes |