EP2C35U484C8 vs EP2C50U484C8 比較
詳細並排比較 EP2C35U484C8 由 Intel 與 EP2C50U484C8 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2C35U484C8 | EP2C50U484C8 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Series | Cyclone II | — |
| Family Name | Cyclone II | — |
| Logic Elements / Cells | 33,216 LE | — |
| Total RAM Bits | 483,840 bits (33216 cells) | — |
| Number of I/O | 322 user I/O | — |
| Number of Logic Blocks/Elements | 2,076 logic blocks | — |
| Number of Gates | [DATA_NEEDED: equivalent gate count] | — |
| Number of PLLs | 4 | — |
| Embedded Multipliers | 35 (18x18) | — |
| Package Type | 484-FBGA (UBGA-484), lead-free | — |
| Package Pin Count | 484 balls | — |
| Speed Grade | C8 (commercial, 8th tier) | C8 (-8 speed bin) |
| Core Voltage | 1.15 V to 1.25 V | 1.15 V to 1.25 V |
| Internal Frequency (max) | 500 MHz | — |
| 工作溫度 | 0C to 85C (commercial) | 0 °C to +85 °C (Commercial) |
| Logic Family / Process | CMOS, 90 nm | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Configuration Modes | JTAG, AS, PS, FPP | JTAG, Active Serial (AS), Active Parallel (AP), Passive Serial (PS) |
| MSL 等級 | 3 (per JEDEC J-STD-020) | — |
| RoHS 狀態 | Compliant (lead-free UBGA) | — |
| 生命週期狀態 | Not Recommended for New Designs (NRND) | — |
| Family | — | Cyclone II |
| Logic Elements | — | 50,528 |
| Logic Array Blocks (LABs) | — | 3,158 |
| Embedded Memory Bits | — | 594,432 |
| M4K RAM Blocks | — | 250 (4 Kbit each) |
| Embedded 18x18 Multipliers | — | 86 |
| PLLs | — | 4 |
| User I/O Pins | — | 294 (132 differential pairs max) |
| Process Node | — | 90 nm CMOS |
| 封裝 | — | 484-ball FineLine BGA (UBGA-484), 19 x 19 mm, 1.0 mm pitch |
| Lead-Free / RoHS | — | Lead-free (UBGA package), RoHS compliant |