EP2S15F672C5N vs EP2S30F672C5N 比較
詳細並排比較 EP2S15F672C5N 由 Intel 與 EP2S30F672C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2S15F672C5N | EP2S30F672C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | Stratix II | — |
| Series | Altera Stratix II | Stratix II |
| Logic Elements | 15,600 | 33,880 |
| Logic Array Blocks (LABs) | 780 | 1694 |
| Configurable Logic Blocks (CLBs) | 6,240 | — |
| Embedded Memory (bits) | 419,328 | 1,369,728 |
| User I/O Pins | 366 | — |
| 封裝 | 672-BBGA / FBGA-672 | 672-ball FBGA (FineLine BGA) |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Maximum Internal Frequency | 640 MHz | — |
| 工作溫度 | 0C to +85C (commercial) | — |
| Speed Grade | -C5 | C5 (-5 commercial) |
| Lead-Free (Pb-Free) | Yes | — |
| RoHS 狀態 | RoHS Compliant | — |
| Family Name | — | Stratix II |
| User I/O Count | — | 500 |
| Process Technology | — | 90 nm CMOS |
| Supply Voltage (Core) | — | [DATA_NEEDED: core VCC value] |
| 工作溫度範圍 | — | Commercial (0C to +85C) |
| Number of PLLs | — | 4 |
| Global Clock Networks | — | 16 |
| Configuration Method | — | Serial / Passive Parallel / Fast Passive Parallel |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Architecture | — | Adaptive Logic Module (ALM) |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |