EP2S60F1020I4N vs EP2S60F1020I4 比較

詳細並排比較 EP2S60F1020I4N 由 Intel 與 EP2S60F1020I4 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S60F1020I4N EP2S60F1020I4
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Series Stratix II Stratix II
Family Stratix II FPGA —
Logic Elements (LE) 60,440 —
Embedded Memory Bits 2,544,192 —
Maximum User I/O 718 718
Number of I/O Banks 32 [DATA_NEEDED: number of I/O banks]
DSP Blocks (18x18 multipliers) 36 —
PLLs 12 —
Core Voltage 1.2 V —
Process Technology 90 nm CMOS 90 nm CMOS
封裝 1020-ball FCBGA (33 x 33 mm) —
工作溫度 -40C to +100C (Industrial) —
Speed Grade -4 —
Configuration Scheme PS, PPS, PPA, FPP, JTAG —
Embedded Transceiver Channels 12 channels up to 6.375 Gbps —
安裝類型 Surface Mount (BGA) Surface Mount
RoHS 狀態 unknown Non-compliant (contains lead per legacy Altera package)
Manufacturer — Intel / Altera
Logic Elements (LEs) — 60,440
Embedded Memory (bits) — 2,544,192
Number of LABs/CLBs — 3022
Number of CLBs — 24176
Operating Voltage (Core) — 1.2 V
Temperature Grade — Industrial (-40C to +100C TJ)
Package Type — 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Package Dimensions — 33 mm x 33 mm
Ball Pitch — 1.0 mm
Configuration Method — Passive Serial / Fast Passive Parallel / JTAG
Number of PLLs — 12
Global Clock Networks — 16
Embedded Multipliers (18x18) — 36
Transceiver Count — 0 (no embedded transceivers)
Maximum Embedded Memory Bandwidth — [DATA_NEEDED: memory bandwidth spec]

資料表與資源

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