EP2S60F484C3 vs EP2S60F484C5N 比較

詳細並排比較 EP2S60F484C3 由 Altera 與 EP2S60F484C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP2S60F484C5N EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N ⚠ 最後購買機會

規格比較

參數 EP2S60F484C3 EP2S60F484C5N
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Series Stratix II —
Manufacturer Altera (now Intel FPGA) —
Logic Elements 60,440 60,440
Adaptive Logic Modules (ALMs) 24,176 24,176
LABs/CLBs 3,022 —
Total RAM Bits 2,544,192 —
User I/O Count 334 —
封裝 484-BBGA, FCBGA (FBGA-484) 484-ball FBGA (FineLine BGA)
Package Size 23 x 23 mm, 1.0 mm pitch —
Core Voltage 1.2 V 1.2 V
Process Technology 90 nm CMOS 90 nm CMOS
Speed Grade C3 C5 (slowest)
工作溫度 0C to +85C (commercial) —
Number of PLLs 12 (Stratix II typical) —
安裝類型 Surface Mount —
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant (lead-free)
Total Multipliers 12 (9-bit embedded multiplier blocks) —
Family — Stratix II
Embedded Memory Bits — 2,544,192 bits
Embedded RAM Blocks (TriMatrix) — Yes
DSP Blocks — 36
18x18 Multipliers — Up to 144 (max for family: 384)
Maximum User I/O — 334
Transceiver Blocks — 12 (up to 6.375 Gbps)
PLLs — 12 (enhanced + fast)
I/O Standards — LVTTL, LVCMOS, LVDS, LVPECL, PCI, PCI-X
Temperature Grade — Commercial (0C to +85C junction)
Configuration Scheme — SRAM-based, volatile (requires EPC16/EPC64 or JTAG)

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