EP2S60F484C5N vs EP2S60F484I5N 比較

詳細並排比較 EP2S60F484C5N 由 Intel 與 EP2S60F484I5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP2S60F484C5N EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N ⚠ 最後購買機會

規格比較

參數 EP2S60F484C5N EP2S60F484I5N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family Stratix II Field Programmable Gate Array (FPGA)
Logic Elements 60,440 —
Adaptive Logic Modules (ALMs) 24,176 —
Embedded Memory Bits 2,544,192 bits —
Embedded RAM Blocks (TriMatrix) Yes —
DSP Blocks 36 —
18x18 Multipliers Up to 144 (max for family: 384) —
Maximum User I/O 334 —
Transceiver Blocks 12 (up to 6.375 Gbps) —
PLLs 12 (enhanced + fast) 12 (4 enhanced + 8 fast)
Core Voltage 1.2 V —
I/O Standards LVTTL, LVCMOS, LVDS, LVPECL, PCI, PCI-X —
Speed Grade C5 (slowest) I5 (industrial, slow-speed for low power)
Temperature Grade Commercial (0C to +85C junction) —
封裝 484-ball FBGA (FineLine BGA) 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch
Process Technology 90 nm CMOS 90 nm CMOS
RoHS 狀態 Compliant (lead-free) [DATA_NEEDED: rohs status not stated in verified data]
Configuration Scheme SRAM-based, volatile (requires EPC16/EPC64 or JTAG) —
Series — Stratix II (EP2S60)
Logic Elements (LE) — 60,440
Adaptive Logic Modules (ALM) — 24,176
Embedded Memory (bits) — 2,544,192
Embedded Memory (M512/M4K/M-RAM blocks) — M512: 330, M4K: 255, M-RAM: 2
DSP Blocks (18-bit multipliers) — 48 blocks (192 18x18 multipliers)
Maximum User I/O Pins — 334
Maximum Fabric Clock — 609.76 MHz
Core Supply Voltage — 1.2 V typical
工作溫度範圍 — -40 °C to +100 °C (industrial)
安裝類型 — Surface Mount (BGA)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Configuration Interface — JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel
Design Tool — Quartus II (legacy; current Intel Quartus Prime with Stratix II device support)

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