EP2S60F484I4 vs EP2S60F484C5 比較

詳細並排比較 EP2S60F484I4 由 Intel 與 EP2S60F484C5 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S60F484I4 EP2S60F484C5
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Series Stratix II —
Manufacturer Intel (formerly Altera) —
Family Stratix II FPGA Stratix II
Logic Elements (LE) 60,440 —
Adaptive Logic Modules (ALM) [DATA_NEEDED: ALM count] —
Embedded Memory Bits 2,544,192 bits (~317 KB) —
Total RAM Blocks [DATA_NEEDED: total RAM blocks] —
User I/O Pins 334 —
User I/O Banks [DATA_NEEDED: I/O bank count] —
High-Speed Transceivers 12 channels —
Transceiver Data Rate [DATA_NEEDED: max Gbps] —
PLLs 4 —
DSP Blocks [DATA_NEEDED: DSP block count] —
Core Voltage 1.2 V —
Process Technology 90 nm CMOS 90 nm CMOS
工作溫度範圍 -40 °C to +100 °C (Industrial, I4) —
Speed Grade I4 (industrial, fastest speed bin for Stratix II F484) C5 (Commercial)
封裝 484-ball FBGA (F484) 484-pin FC-FBGA (FBGA)
Ball Pitch [DATA_NEEDED: ball pitch in mm] 1.0 mm
安裝類型 Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Contains Lead; RoHS Non-Compliant (per distributor data) —
Configuration Method SRAM-based, loaded via Quartus II bitstream —
MSL 等級 [DATA_NEEDED: MSL rating] 3 (168 hours)
Logic Elements — 60440
Configurable Logic Blocks (CLBs) — 24176
Logic Array Blocks (LABs) — 3022
Embedded Memory (RAM bits) — 2,544,192
Maximum User I/O — 334
Package Size — 23 x 23 mm
Core Voltage (VCCINT) — 1.2 V
Maximum Internal Frequency — 609.76 MHz
工作溫度 — Commercial (0C to +85C)
RoHS 狀態 — Compliant

資料表與資源

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