EP2S60F484I4N vs EP2S60F484I4 比較

詳細並排比較 EP2S60F484I4N 由 Intel 與 EP2S60F484I4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S60F484I4N EP2S60F484I4
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series Stratix II Stratix II
Family Stratix II (EP2S60) Stratix II FPGA
Logic Elements (LE) 60,440 60,440
Logic Array Blocks (LABs) 3,022 —
Total RAM Bits 2,544,192 —
Number of I/O 334 —
Number of DSP Blocks 18 (typical) —
Number of PLLs 12 (typical) —
封裝 484-BBGA, FCBGA 484-ball FBGA (F484)
安裝類型 Surface Mount Surface Mount
工作溫度 -40C to +100C (Industrial, I4) —
Speed Grade -4 (mid) I4 (industrial, fastest speed bin for Stratix II F484)
供應電壓 1.2 V (core) —
RoHS 狀態 Compliant —
Lead-Free Yes —
Manufacturer — Intel (formerly Altera)
Adaptive Logic Modules (ALM) — [DATA_NEEDED: ALM count]
Embedded Memory Bits — 2,544,192 bits (~317 KB)
Total RAM Blocks — [DATA_NEEDED: total RAM blocks]
User I/O Pins — 334
User I/O Banks — [DATA_NEEDED: I/O bank count]
High-Speed Transceivers — 12 channels
Transceiver Data Rate — [DATA_NEEDED: max Gbps]
PLLs — 4
DSP Blocks — [DATA_NEEDED: DSP block count]
Core Voltage — 1.2 V
Process Technology — 90 nm CMOS
工作溫度範圍 — -40 °C to +100 °C (Industrial, I4)
Ball Pitch — [DATA_NEEDED: ball pitch in mm]
Lead-Free / RoHS — Contains Lead; RoHS Non-Compliant (per distributor data)
Configuration Method — SRAM-based, loaded via Quartus II bitstream
MSL 等級 — [DATA_NEEDED: MSL rating]

資料表與資源

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