EP2SGX130GF40C3NES vs EP2SGX130GF1508C4 比較

詳細並排比較 EP2SGX130GF40C3NES 由 Altera 與 EP2SGX130GF1508C4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2SGX130GF40C3NES EP2SGX130GF1508C4
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Stratix II GX —
Logic Elements 132540 132,540
Logic Array Blocks (LABs) 7047 6,627
Maximum Internal Frequency 778.82 MHz —
Process Technology 90 nm CMOS 90 nm CMOS
Core Voltage 1.2 V 1.15 V to 1.25 V (1.2 V nominal)
Transceiver Channels 4 to 20 (per device family configuration) —
Maximum Transceiver Data Rate 6.375 Gbps —
Transceiver Feature Embedded SERDES with Clock/Data Recovery (CRU) —
記憶體類型 TriMatrix embedded memory (distributed RAM, block RAM, shift register) —
封裝 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) —
Operating Temperature Grade Commercial Extended —
Terminal Form Ball (BGA) —
安裝類型 Surface Mount Surface Mount
RoHS 狀態 Lead-free compliant (per package code MS-034AAU-1) [DATA_NEEDED: RoHS compliance status]
Series EP2SGX130 Stratix II GX
Embedded Memory (Bits) — 6,748,160
Maximum User I/O — 734
Internal Operating Frequency — 717 MHz
Number of PLLs — 4
18 x 18 Multipliers — 6,744 (approx, family feature)
Package Type — 1508-Ball FC-FBGA
Package Dimensions — 40 mm x 40 mm
Ball Pitch — 1.0 mm
工作接面溫度 — 0 C to 85 C (commercial grade)
Logic Family — CMOS
Transceivers — Embedded multi-gigabit transceivers (Stratix II GX feature)

資料表與資源

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