EP2SGX130GF40C4ES vs EP2SGX130GF40C3ES 比較

詳細並排比較 EP2SGX130GF40C4ES 由 Intel 與 EP2SGX130GF40C3ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。

Intel

EP2SGX130GF40C4ES - 132,540 Logic Cells FPGA | Intel

EP2SGX130GF40C4ES Unknown

Altera

EP2SGX130GF40C3ES Obsolete

參數	EP2SGX130GF40C4ES	EP2SGX130GF40C3ES
品牌	Intel	Altera
類別	FPGA & CPLD	FPGA & CPLD
生命週期狀態	Unknown	Obsolete
Product Type	Field-programmable gate array (FPGA)	—
Product Family	Stratix II GX	—
Logic Cells	132,540	—
Configurable Logic Blocks	7,047 CLBs	—
Logic Technology	CMOS	—
User I/O	734 I/O	—
Internal Frequency	717 MHz	—
Supply Voltage Range	1.15 V to 1.25 V	—
Package Pin Count	1,508 pins	—
Package Type	FBGA-1508	—
Package Body Size	40 mm by 40 mm	—
Ball Pitch	1 mm	—
Package Designation	MS-034AAU-1	—
Lead-Free	Yes	—
安裝類型	Surface mount	Surface Mount (BGA)
工作溫度範圍	[DATA_NEEDED: operating temperature range]	—
Transceiver Count	[DATA_NEEDED: transceiver count]	—
Configuration Memory Type	[DATA_NEEDED: configuration memory type]	—
Family	—	Stratix II GX
Series	—	EP2SGX130
Logic Elements	—	132,540
Adaptive Logic Modules (ALMs)	—	[DATA_NEEDED: ALM count]
Logic Array Blocks (LABs)	—	7,047
Embedded Memory (TriMatrix)	—	6,747 Kbits
DSP Blocks	—	Up to 17
High-Speed Transceiver Channels	—	4 to 20 (per device variant)
Transceiver Data Rate	—	Up to 6.375 Gbps
Global Clock Networks	—	Up to 16
Regional Clock Networks	—	Up to 32 per device region
Internal Core Voltage	—	1.2 V
Process Technology	—	90 nm CMOS
Memory Controller Performance	—	Up to 550 MHz (DDR/DDR2)
DSP Multiplier Performance	—	Up to 450 MHz
封裝	—	FBGA-1508, 40 x 40 mm, 1.0 mm pitch (MS-034AAU-1)
Operating Temperature Grade	—	Commercial Extended (C3)
RoHS 狀態	—	Lead-Free (per package marking MS-034AAU-1)