EP2SGX30F780C3N vs EP2SGX30CF780C3NGB 比較
詳細並排比較 EP2SGX30F780C3N 由 Altera 與 EP2SGX30CF780C3NGB 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2SGX30F780C3N | EP2SGX30CF780C3NGB |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | 最後購買 |
| Family | Stratix II GX | Stratix II GX (Enhanced Configuration / EPC variant) |
| Logic Elements | 33,880 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| User I/O Pins | 361 | 361 |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Total Transceivers | Up to 12 | — |
| Max Transceiver Data Rate | 6.375 Gbps | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Max Internal Frequency | 816.9 MHz | — |
| 工作溫度 | 0C to +85C (Commercial, C3 suffix) | 0C to +85C (commercial grade, 'C' speed grade) |
| Package Type | 780-ball FC-FBGA (29x29 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount (flip-chip BGA) |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG, AES-128 | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | Compliant (per 'N' suffix on Altera part numbering) |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Series | — | Stratix II GX |
| Logic Elements (LE) | — | 33,880 |
| Logic Array Blocks (LABs) | — | 1,694 |
| Maximum Internal Frequency | — | 816.9 MHz |
| Number of Transceivers | — | [DATA_NEEDED: number of integrated transceivers] |
| Transceiver Data Rate | — | up to 3.125 Gbps |
| 封裝 | — | 780-BBGA (FC-FBGA) |
| Configuration Mode | — | Enhanced Configuration (EPC), N suffix indicates lead-free / enhanced option |
| Ordering Suffix | — | GB (tape and reel / packaging variant, Altera ordering code suffix) |