EP2SGX60DF780I3N vs EP2SGX60DF780I4N 比較
詳細並排比較 EP2SGX60DF780I3N 由 Altera 與 EP2SGX60DF780I4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP2SGX60DF780I3N - 60K LE Stratix II GX FPGA, 780-FBGA | Intel / Altera
EP2SGX60DF780I3N Nrnd
規格比較
| 參數 | EP2SGX60DF780I3N | EP2SGX60DF780I4N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | Stratix II GX | Stratix II GX |
| Series | EP2SGX60 | — |
| Logic Elements | 60,440 | 60,440 |
| Configurable Logic Blocks (CLBs) | 60,440 | — |
| 最大時脈頻率 | 622.08 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Nominal Core Supply Voltage | 1.2 V | — |
| 封裝 | 780-ball FC-FBGA (S-PBGA-B780) | FBGA-780 (DF) |
| Terminal Pitch | 1.00 mm | — |
| 安裝類型 | Surface Mount | — |
| 工作溫度範圍 | -40 °C to +85 °C (Industrial) | — |
| Speed Grade | I3 | — |
| High-Speed Serial Transceivers | Multi-gigabit embedded transceivers (per Stratix II GX family) | — |
| On-chip Memory | TriMatrix embedded memory blocks (per Stratix II GX family) | — |
| Logic Element Architecture | Adaptive Logic Module (ALM) | — |
| DSP Blocks | Embedded multiplier/DSP blocks (per Stratix II GX family) | — |
| RoHS 狀態 | [DATA_NEEDED: per-lot RoHS confirmation] | — |
| Design Tool | Quartus II (Stratix II GX support) | — |
| Logic Array Blocks (LABs) | — | 3,022 |
| User I/O Pins | — | 364 |
| Embedded Transceivers | — | Yes (multi-gigabit) |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| Core Voltage | — | 1.2 V |
| Package Body Size | — | 29 x 29 mm |
| Ball Pitch | — | 1.0 mm |
| 工作溫度 | — | -40C to +100C (industrial) |
| Lead Free | — | Yes |
| RoHS | — | Compliant |
| Maximum Internal Frequency | — | 732.1 MHz |