EP2SGX60EF1152I4N vs EP2SGX60EF1152I5 比較
詳細並排比較 EP2SGX60EF1152I4N 由 Intel 與 EP2SGX60EF1152I5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP2SGX60EF1152I4N | EP2SGX60EF1152I5 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Device Type | FPGA | — |
| Product Family | Stratix II GX | — |
| Logic Cells | 60,440 | — |
| Embedded Memory | 2,544,192 bits | — |
| I/O Count | 534 | — |
| Internal Frequency | 717 MHz | — |
| 供應電壓 | 1.2 V | — |
| 封裝 | 1,152-ball FBGA | 1152-ball FC-FBGA (PBGA1152), 35 x 35 mm, 1.00 mm pitch |
| Package Type | Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484 | — |
| Pins | 484 | — |
| Device Technology | 90 nm | — |
| Logic Blocks | 3,022 LABs | — |
| 安裝類型 | Surface mount | Surface Mount (flip-chip BGA) |
| Operating Temperature Grade | Industrial | Industrial (-40 °C to +85 °C) |
| Compliance | [DATA_NEEDED: compliance certification details] | — |
| Transceiver Count | [DATA_NEEDED: high-speed transceiver count] | — |
| Configuration Memory | [DATA_NEEDED: configuration memory specification] | — |
| Package Pinout | [DATA_NEEDED: complete ball-map pinout] | — |
| Family | — | Stratix II GX |
| Logic Elements (LEs) | — | 60,440 |
| Configurable Logic Blocks (CLBs) | — | 60,440 |
| Embedded Memory (bits) | — | 2,544,192 |
| 最大時脈頻率 | — | 622.08 MHz |
| Process Technology | — | 90 nm CMOS |
| Core Supply Voltage | — | 1.15 V to 1.25 V |
| Terminal Form | — | Ball |
| Number of Terminals | — | 1152 |
| Package Code | — | BGA |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Transceivers | — | Integrated multi-gigabit transceivers (per Stratix II GX family) |
| DSP Blocks | — | Yes, hardware multipliers and DSP blocks (per Stratix II GX family) |