EP2SGX90FF40C5NES vs EP2SGX90FF40C5N 比較
詳細並排比較 EP2SGX90FF40C5NES 由 Altera 與 EP2SGX90FF40C5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP2SGX90FF40C5N - Stratix II GX FPGA 90K LE, 40Gbps Tranceivers | Altera
EP2SGX90FF40C5N Obsolete規格比較
| 參數 | EP2SGX90FF40C5NES | EP2SGX90FF40C5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Series | EP2SGX90 | Stratix II GX |
| Logic Elements | 90,960 | 90,960 |
| Configurable Logic Blocks (CLBs) | 4,828 | — |
| Process Technology | 90 nm CMOS | — |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Core Frequency | 609.76 MHz | — |
| 封裝 | 1508-pin FC-FBGA | 1,508-ball FineLine BGA (FBGA) |
| 安裝類型 | Surface Mount (flip-chip BGA) | — |
| Temperature Grade | Commercial Extended | — |
| Embedded Transceivers | Multi-gigabit transceiver (CMU) channels | — |
| On-chip Memory | M512/M4K/M-RAM blocks (TriMatrix memory) | — |
| DSP Blocks | Embedded multiplier/accumulator DSP blocks | [DATA_NEEDED: DSP block count] |
| PLL Count | Multiple PLLs with dedicated analog supply pins | — |
| RoHS 狀態 | Compliant (lead-free) | [DATA_NEEDED: RoHS compliance] |
| Speed Grade | C5 | — |
| Logic Array Blocks (LABs) | — | 4,548 |
| Maximum User I/O Pins | — | 650 |
| Transceiver Data Rate | — | Up to 6.375 Gbps |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count per package] |
| Embedded Block RAM | — | [DATA_NEEDED: total block RAM bits] |
| Process Node | — | 90 nm |
| Ball Pitch | — | 1.00 mm |
| 工作溫度 | — | Commercial (0C to +85C) |