EP3C40F484C8N vs EP3C55F484C6 比較
詳細並排比較 EP3C40F484C8N 由 Altera 與 EP3C55F484C6 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3C40F484C8N | EP3C55F484C6 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Cyclone III | Cyclone III |
| Logic Elements | 39,600 | 55,856 LE |
| Logic Array Blocks (LABs) | 2,475 | — |
| Embedded Memory | 1,161,216 bits (1134 Kbit M9K RAM) | 2,396,160 bits (2.4 Mbit) |
| Embedded 18×18 Multipliers | 126 | — |
| User I/Os | 331 | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | 20 |
| Process Technology | TSMC 65 nm low-power CMOS | 65 nm low-power CMOS |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| 封裝 | 484-FBGA (23×23 mm, 1.0 mm pitch) | 484-FBGA (F484) |
| Speed Grade | 8 (commercial) | 6 (commercial) |
| 工作溫度 | -40C to +85C (industrial) | 0C to +85C (commercial) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS 狀態 | Lead-free / RoHS compliant | Compliant |
| Configuration Modes | AS, AP, PS, JTAG | — |
| LVDS Data Rate | Up to 875 Mbps per pair | — |
| Series | — | EP3C55 |
| Maximum User I/O | — | 327 |
| Core Voltage | — | 1.2 V |
| Number of PLLs | — | 4 |
| Embedded 18x18 Multipliers | — | 56 |
| I/O Banks | — | 8 |
| Supported I/O Standards | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| Configuration | — | JTAG, AS (EPCS), PS, FPP |