EP3CLS100U484I7 vs EP3CLS70U484I7 比較
詳細並排比較 EP3CLS100U484I7 由 Intel 與 EP3CLS70U484I7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3CLS100U484I7 | EP3CLS70U484I7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | Cyclone III LS | Cyclone III LS |
| Logic Elements | 100,448 | 70,208 |
| Total RAM Bits | 4,451,328 | — |
| User I/O Count | 278 | — |
| Number of Terminals | 484 | — |
| Package Type | 484-FBGA (UBGA), 1.0 mm pitch | 484-FBGA / 484-UBGA (UBGA-484) |
| 供應電壓 | 1.2 V core | — |
| Embedded 18x18 Multipliers | 66 | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Process Technology | TSMC 60 nm low-power | 60 nm low-power CMOS |
| Configuration Methods | AS, PS, FPP, JTAG | — |
| Operating Temperature Grade | Industrial (I7): -40C to +100C junction | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| RoHS 狀態 | Compliant (Pb-free) | Compliant |
| Device Type | — | FPGA - Field Programmable Gate Array |
| Number of Logic Blocks | — | 4,612 |
| Total Memory Bits | — | 3,068,928 (3 Mb) |
| Number of M9K Memory Blocks | — | 247 |
| Number of Embedded 18x18 Multipliers | — | 247 |
| Number of PLLs | — | 4 |
| User I/O Pins | — | 278 |
| Package Size | — | 19 mm x 19 mm |
| Ball Pitch | — | 1.0 mm |
| Core Supply Voltage | — | 1.2 V |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V |
| 工作溫度 | — | -40C to +100C (Industrial) |
| Configuration Modes | — | JTAG, Passive Serial, Active Serial, Fast Passive Parallel |
| MSL 等級 | — | 3 (168 hours) |