EP3SE110F1152C2NES vs EP3SE110F1152C2 比較
詳細並排比較 EP3SE110F1152C2NES 由 Altera 與 EP3SE110F1152C2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SE110F1152C2NES | EP3SE110F1152C2 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 最後購買 |
| Family | Stratix III Enhanced (EP3SE110) | Stratix III E (Enhanced) |
| Manufacturer | Altera (Intel) | — |
| Process Technology | 65 nm | 65 nm |
| Logic Elements | 107,500 | 107,500 |
| User I/O Pins | 744 | — |
| Core Voltage | 1.1 V | 0.9 V |
| Maximum Operating Frequency | 600 MHz | — |
| 封裝 | FC-FBGA-1152 (Flip-Chip) | 1152-ball FC-BGA |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| 工作溫度範圍 | [DATA_NEEDED: temperature grade] | — |
| Speed Grade | C2 | — |
| 記憶體類型 | Embedded M9K blocks | — |
| DSP Blocks | Yes (variable-precision DSP) | — |
| Transceivers | [DATA_NEEDED: transceiver count] | — |
| Configuration | SRAM-based, volatile | SRAM-based, volatile (requires configuration device) |
| Programming Interface | JTAG / Passive Serial / Fast Passive Parallel | — |
| Toolchain | Quartus II (Stratix III support) | — |
| RoHS 狀態 | Non-Compliant (per Kynix listing) | — |
| Logic Array Blocks (LABs) | — | 4,300 |
| Adaptive Logic Modules (ALMs) | — | 53,750 |
| Embedded Memory (bits) | — | 8,936,448 |
| Maximum User I/Os | — | 744 |
| Maximum Internal Frequency | — | 800 MHz |
| 工作溫度 | — | 0C to 85C (Commercial) |
| Package Code | — | F1152 |
| Device Type | — | FPGA |