EP3SL200F1517I4LN vs EP3SL200F1517I4 比較
詳細並排比較 EP3SL200F1517I4LN 由 Intel 與 EP3SL200F1517I4 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SL200F1517I4LN | EP3SL200F1517I4 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | Stratix III L | Stratix III L |
| Logic Elements | 200,000 | 200,000 |
| Embedded Memory Bits | 10,901,504 | — |
| Logic Array Blocks (LABs) | 8,000 | 8000 |
| User I/O Pins | 976 | — |
| 封裝 | 1517-BBGA, FCBGA | 1517-ball FC-FBGA |
| Process Technology | 65 nm TSMC low-power | — |
| 工作溫度 | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free | Yes | Yes |
| MSL 等級 | [DATA_NEEDED: MSL moisture sensitivity level] | 3 |
| Supply Voltage Core | [DATA_NEEDED: VCC core voltage] | — |
| Transceiver Data Rate (max) | [DATA_NEEDED: max transceiver rate] | — |
| DSP Blocks (18x18 multipliers) | 384 | — |
| DSP Performance | 288 GMACS | — |
| Configuration Method | Passive Parallel / Active Serial / JTAG | — |
| Ball Pitch | 1.0 mm | — |
| Package Dimensions | 40 mm x 40 mm | — |
| Embedded Memory | — | 10,901,504 bits (~10.4 Mbit) |
| Maximum User I/Os | — | 976 |
| Process Node | — | 65 nm |
| Core Voltage | — | 1.1 V |
| Internal Frequency | — | up to 450 MHz |
| Supply Voltage Range | — | 0.9 V to 1.1 V core |
| Device Type | — | FPGA - Field Programmable Gate Array |