EP3SL340H1152C4 vs EP3SL340H1152C4L 比較

詳細並排比較 EP3SL340H1152C4 由 Intel 與 EP3SL340H1152C4L 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP3SL340H1152C4 EP3SL340H1152C4L
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 NRND
Family Stratix III L —
Logic Elements (LE) 337,500 —
Adaptive Logic Modules (ALM) 135,000 —
Logic Array Blocks (LAB) 13,500 —
User I/Os 744 —
Total I/O Pins 1,152 —
封裝 1152-pin FCBGA (Flip-Chip BGA) 1152-BBGA, FCBGA (HBGA)
Process Technology 65 nm 65 nm
Core Voltage (VCCINT) 1.1 V 1.1 V
Speed Grade C4 (commercial, speed grade 4) C4L (L-suffix low power)
工作溫度 0C to 85C (commercial) 0 C to +85 C (commercial)
Configuration Passive Serial, Fast Passive Parallel, JTAG —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等級 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL rating]
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Series — Stratix III L
Logic Elements — 337,500
Embedded Memory Bits — 18,822,144
Maximum User I/O — 744
Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Embedded 18x18 Multipliers — 384 (per family datasheet)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free status]
Configuration Memory — SRAM-based, volatile (needs external config device)
Maximum Operating Frequency — [DATA_NEEDED: per design, ~450 MHz logic per GlobalSpec listing]
I/O Standards Supported — LVDS, LVTTL, LVCMOS, SSTL, HSTL (per family)

資料表與資源

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