EP3SL50F780C3N vs EP3SL50F780I3N 比較
詳細並排比較 EP3SL50F780C3N 由 Altera 與 EP3SL50F780I3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SL50F780C3N | EP3SL50F780I3N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | Stratix III L (low-power sub-family) | — |
| Series | EP3SL50 | Stratix III L |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements | 47,500 | 47,500 |
| Number of LABs/CLBs | 1900 | — |
| Total RAM Bits | 2,184,192 | — |
| Number of I/Os | 488 | — |
| 輸出數量 | 488 | — |
| Maximum Internal Frequency | 500 MHz | — |
| Process Technology | 65 nm | 65 nm CMOS |
| Core Supply Voltage | 1.1 V | 1.1 V |
| 封裝 | 780-BBGA, FCBGA (Flip-Chip FBGA) | 780-ball FC-FBGA (Flip-Chip BGA) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0C to +85C (Commercial) | -40C to +100C (industrial) |
| RoHS 狀態 | Compliant | Compliant (LEAD FREE) |
| Manufacturer | — | Altera (Intel Programmable Solutions Group) |
| Number of LABs | — | 1,900 |
| Embedded Memory Bits | — | 2,184,192 bits |
| Maximum User I/O | — | 488 |
| Operating Frequency (max) | — | 500 MHz |
| Speed Grade | — | -3 |
| JTAG Support | — | IEEE Std 1149.1 Boundary-Scan |
| Configuration Method | — | JTAG / Serial / Passive / Active |