EP610DC-30 vs EP610DI-30 比較
詳細並排比較 EP610DC-30 由 Altera 與 EP610DI-30 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ 啟用中規格比較
| 參數 | EP610DC-30 | EP610DI-30 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 啟用中 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | EP610 (Classic Device Family) | Classic EP610 |
| Macrocells | 16 | 16 |
| Logic Expanders | 4 (4 product terms per macrocell) | — |
| Usable Gates | 300 | — |
| Maximum Pipelined Clock Frequency | 100 MHz | — |
| Propagation Delay (tPD) | 30 ns | 30 ns |
| Dedicated Inputs | 16 | — |
| I/O Pins | 16 (with output enable) | [DATA_NEEDED: I/O pin count] |
| 封裝 | 24-pin CERDIP (windowed) | CERDIP-24 (windowed, UV-erasable) |
| 安裝類型 | Through-Hole | Through-Hole |
| Speed Grade | -30 (30 ns tPD) | — |
| Technology | CMOS EPROM | CMOS |
| Programmability | UV-erasable, windowed EPROM | — |
| Security Bit | Yes (protects design after programming) | — |
| Output Modes | Registered and Combinatorial | — |
| 工作溫度 | Commercial (0C to +70C) | [DATA_NEEDED: operating temperature range] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Pipelined Data Rate | — | 100 MHz |
| 供應電壓 | — | 5 V (single supply) |
| Programmable Elements | — | EPROM (UV-erasable, windowed) |
| Logic Capacity | — | [DATA_NEEDED: usable gates / logic capacity] |
| RoHS 狀態 | — | unknown |
| Lead-Free | — | unknown |
| Original Manufacturer | — | Altera (now Intel) |
| Current Supplier | — | Rochester Electronics (authorized continuing source) |
| MSL 等級 | — | N/A (through-hole, non-surface-mount) |