EP610DI-35 vs EP610DI-30 比較
詳細並排比較 EP610DI-35 由 Intel 與 EP610DI-30 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteRochester Electronics
EP610DI-30 - 16-Macrocell Classic EPLD, 30ns, CERDIP-24 | Rochester Electronics
EP610DI-30 ✓ 啟用中規格比較
| 參數 | EP610DI-35 | EP610DI-30 |
|---|---|---|
| 品牌 | Intel | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | Altera Classic EPLD | Classic EP610 |
| Series | EP610 | — |
| Logic Cells / Macrocells | 16 macrocells | — |
| Usable Gates | 300 | — |
| Product Terms | 160 | — |
| I/O Pins | 16 bidirectional | [DATA_NEEDED: I/O pin count] |
| Total Inputs | 20 (including 4 dedicated inputs) | — |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Internal Pipelined Data Rate | Up to 100 MHz | — |
| 供應電壓 | 5 V | 5 V (single supply) |
| Technology | CMOS, UV-erasable | CMOS |
| 封裝 | 24-pin CDIP (Ceramic DIP) | CERDIP-24 (windowed, UV-erasable) |
| 安裝類型 | Through-hole | Through-Hole |
| 工作溫度 | [DATA_NEEDED: industrial/commercial grade range] | [DATA_NEEDED: operating temperature range] |
| RoHS 狀態 | [DATA_NEEDED: not confirmed in supplied web data] | unknown |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 30 ns |
| Pipelined Data Rate | — | 100 MHz |
| Programmable Elements | — | EPROM (UV-erasable, windowed) |
| Logic Capacity | — | [DATA_NEEDED: usable gates / logic capacity] |
| Lead-Free | — | unknown |
| Original Manufacturer | — | Altera (now Intel) |
| Current Supplier | — | Rochester Electronics (authorized continuing source) |
| MSL 等級 | — | N/A (through-hole, non-surface-mount) |