EP610ILC-10 vs EP610LC15 比較
詳細並排比較 EP610ILC-10 由 Altera 與 EP610LC15 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 Obsolete規格比較
| 參數 | EP610ILC-10 | EP610LC15 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | Classic EPLD | Classic EPLD (EP610) |
| Product Type | UV-Erasable / OTP PLD | — |
| Architecture | PAL-type with macrocells | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Product Terms | 160 | — |
| I/O Pins | 16 | 16 |
| Dedicated Inputs | 4 | 10 |
| 供應電壓 | 5 V (single supply) | — |
| Pin-to-Pin Delay (tPD) | 10 ns (grade -10) | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family Compatibility | TTL (5 V CMOS/TTL-compatible I/O) | — |
| 封裝 | PLCC-28 (plastic J-lead chip carrier) | PLCC-28 (J-Lead) |
| 安裝類型 | Surface Mount (PLCC socket or solder) | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0 °C to +70 °C (LC suffix = commercial) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | Compliant (Rochester re-creation) |
| Number of Macrocells | — | 16 |
| Number of Usable Gates | — | [DATA_NEEDED: usable gate count] |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (±10%) |
| Total Logic Pins | — | 24 |
| Technology | — | UV-erasable EPROM, CMOS |
| Programming Interface | — | Altera 4-pin serial (Classic algorithm) |
| Security Bit | — | Yes (programmable) |