EP610LC-25 vs EP610PI-25 比較
詳細並排比較 EP610LC-25 由 Intel 與 EP610PI-25 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 Obsolete規格比較
| 參數 | EP610LC-25 | EP610PI-25 |
|---|---|---|
| 品牌 | Intel | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | Erasable Programmable Logic Device (EPLD) |
| Family | Classic EPLD | — |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| 供應電壓 | 5 V ±5% | — |
| Technology | CMOS | — |
| Programmability | UV-erasable (windowed package) | — |
| 封裝 | PLCC-28 | 24-pin DIP (PI) ceramic through-hole |
| 工作溫度 | 0C to +70C (commercial) | — |
| 安裝類型 | Surface Mount | Through-Hole (DIP) |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| RoHS 狀態 | [DATA_NEEDED] | — |
| Series | — | Classic EP610 |
| Usable Gates | — | ~300 gates |
| Maximum Internal Frequency (fCNT) | — | [DATA_NEEDED: fCNT] |
| Number of Dedicated Inputs | — | 4 |
| Number of Bidirectional I/O Pins | — | 16 |
| 工作溫度範圍 | — | Industrial (I suffix): -40C to +85C |
| Supply Voltage (VCC) | — | 5 V nominal |
| Process Technology | — | CMOS, UV-erasable |
| Programmable Flip-Flop Modes | — | D, T, JK, SR (per macrocell) |
| Global Clock Pins | — | 1 |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS] |
| Original Manufacturer | — | Altera (now Intel PSG; legacy stock from Rochester Electronics) |