EP610LI-25 vs EP610LI-30 比較

詳細並排比較 EP610LI-25 由 Rochester Electronics 與 EP610LI-30 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Rochester Electronics
EP610LI-30 EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 - 16-Macrocell Classic EPLD, 30ns | Rochester

EP610LI-30 ✓ 啟用中

規格比較

參數 EP610LI-25 EP610LI-30
品牌 Rochester Electronics Rochester Electronics
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 啟用中 啟用中
Product Type EPLD (Erasable Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Family Altera Classic EP610 Classic EPLD (MAX architecture)
Macrocells 16 16
Usable Gates 300 —
Maximum Propagation Delay (tPD) 25 ns —
Pipelined Data Rate (fMAX) 100 MHz —
Speed Grade 25 (25 ns tPD) —
Power Variant L (low-power CMOS) —
Temperature Grade I (industrial) —
Dedicated Inputs 4 —
I/O Pins 16 —
Technology CMOS, UV-erasable (windowed) —
封裝 Ceramic DIP-24 (windowed, Altera 'I' designation) 24-pin Ceramic DIP (windowed, CDIP)
安裝類型 Through-hole —
Programming Method Altera MAX+PLUS II / Classic compiler + compatible programmer UV erase + Classic-series PLD programmer
RoHS 狀態 Unknown - ceramic DIP legacy package unknown
Manufacturer / Source Altera (original), Rochester Electronics (authorized continuing supplier) —
Pin-to-Pin Delay (tPD) — 30 ns
Maximum Internal Frequency (fMAX) — 100 MHz (pipelined)
AND Array — 24V16
Process Technology — CMOS, UV-erasable EPROM cells
Supply Voltage (VCC) — 5 V (TTL-compatible I/O)
工作溫度 — -55C to +125C (military/extended)
Output Polarity — User-configurable per macrocell
Flip-Flop per Cell — D / T / J-K configurable
Manufacturer — Rochester Electronics (originally Altera)

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