EP610LI-30 vs EP610LI-15 比較
詳細並排比較 EP610LI-30 由 Rochester Electronics 與 EP610LI-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610LI-30 | EP610LI-15 |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD (MAX architecture) | — |
| Macrocells | 16 | 16 |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Maximum Internal Frequency (fMAX) | 100 MHz (pipelined) | — |
| AND Array | 24V16 | — |
| Process Technology | CMOS, UV-erasable EPROM cells | CMOS EPROM (UV-erasable) |
| Supply Voltage (VCC) | 5 V (TTL-compatible I/O) | 4.75 V to 5.25 V (5 V nominal) |
| 封裝 | 24-pin Ceramic DIP (windowed, CDIP) | 24-pin ceramic DIP, side-brazed, windowed (DIP-24) |
| 工作溫度 | -55C to +125C (military/extended) | 0 C to +70 C (commercial, "I" grade) |
| Output Polarity | User-configurable per macrocell | — |
| Flip-Flop per Cell | D / T / J-K configurable | — |
| Programming Method | UV erase + Classic-series PLD programmer | UV erase + EPROM programmer |
| RoHS 狀態 | unknown | Non-compliant (ceramic DIP, SnPb finish typical) |
| Manufacturer | Rochester Electronics (originally Altera) | — |
| Device Family | — | Classic EPLD EP610 |
| Propagation Delay (tPD) | — | 15 ns |
| Counter Frequency (fCNT) | — | 83.3 MHz |
| 腳位數 | — | 24 |
| Logic Blocks | — | AND/OR array, 16 output macrocells |
| I/O Standard | — | TTL/CMOS compatible |
| 輸出類型 | — | 3-state |
| Manufacturer (current) | — | Rochester Electronics (authorized Altera legacy distributor) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |