EP610LI-30 vs EP610LI-25 比較
詳細並排比較 EP610LI-30 由 Rochester Electronics 與 EP610LI-25 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 ✓ 啟用中規格比較
| 參數 | EP610LI-30 | EP610LI-25 |
|---|---|---|
| 品牌 | Rochester Electronics | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Product Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Classic EPLD (MAX architecture) | Altera Classic EP610 |
| Macrocells | 16 | 16 |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Maximum Internal Frequency (fMAX) | 100 MHz (pipelined) | — |
| AND Array | 24V16 | — |
| Process Technology | CMOS, UV-erasable EPROM cells | — |
| Supply Voltage (VCC) | 5 V (TTL-compatible I/O) | — |
| 封裝 | 24-pin Ceramic DIP (windowed, CDIP) | Ceramic DIP-24 (windowed, Altera 'I' designation) |
| 工作溫度 | -55C to +125C (military/extended) | — |
| Output Polarity | User-configurable per macrocell | — |
| Flip-Flop per Cell | D / T / J-K configurable | — |
| Programming Method | UV erase + Classic-series PLD programmer | Altera MAX+PLUS II / Classic compiler + compatible programmer |
| RoHS 狀態 | unknown | Unknown - ceramic DIP legacy package |
| Manufacturer | Rochester Electronics (originally Altera) | — |
| Usable Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Speed Grade | — | 25 (25 ns tPD) |
| Power Variant | — | L (low-power CMOS) |
| Temperature Grade | — | I (industrial) |
| Dedicated Inputs | — | 4 |
| I/O Pins | — | 16 |
| Technology | — | CMOS, UV-erasable (windowed) |
| 安裝類型 | — | Through-hole |
| Manufacturer / Source | — | Altera (original), Rochester Electronics (authorized continuing supplier) |