EP610PC-25 vs EP610PI-25 比較
詳細並排比較 EP610PC-25 由 Altera 與 EP610PI-25 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 Obsolete規格比較
| 參數 | EP610PC-25 | EP610PI-25 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | Classic EPLD (EP610 series) | — |
| Macro Cells | 16 | — |
| Usable Gates | 300 | ~300 gates |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Technology | CMOS, EPROM (UV-erasable) | — |
| Device Type | OT PLD, PAL-type, CMOS | — |
| Dedicated Inputs | 4 | — |
| I/O Pins | 20 (bidirectional, JTAG-programmable OE per macrocell) | — |
| 封裝 | PDIP-24 (0.3 inch, through-hole) | 24-pin DIP (PI) ceramic through-hole |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | — |
| Programming Method | EPROM (UV-erasable), via Altera programming hardware | — |
| 安裝類型 | Through-Hole (DIP) | Through-Hole (DIP) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | — |
| Product Type | — | Erasable Programmable Logic Device (EPLD) |
| Series | — | Classic EP610 |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Internal Frequency (fCNT) | — | [DATA_NEEDED: fCNT] |
| Number of Dedicated Inputs | — | 4 |
| Number of Bidirectional I/O Pins | — | 16 |
| 工作溫度範圍 | — | Industrial (I suffix): -40C to +85C |
| Supply Voltage (VCC) | — | 5 V nominal |
| Process Technology | — | CMOS, UV-erasable |
| Programmable Flip-Flop Modes | — | D, T, JK, SR (per macrocell) |
| Global Clock Pins | — | 1 |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS] |
| Original Manufacturer | — | Altera (now Intel PSG; legacy stock from Rochester Electronics) |