EP610PI-25 vs EP610LI-25 比較

詳細並排比較 EP610PI-25 由 Rochester Electronics 與 EP610LI-25 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Rochester Electronics
EP610PI-25 EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester

EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester

EP610PI-25 Obsolete

規格比較

參數 EP610PI-25 EP610LI-25
品牌 Rochester Electronics Rochester Electronics
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 啟用中
Product Type Erasable Programmable Logic Device (EPLD) EPLD (Erasable Programmable Logic Device)
Series Classic EP610 —
Macrocells 16 16
Usable Gates ~300 gates 300
Propagation Delay (tPD) 25 ns —
Maximum Internal Frequency (fCNT) [DATA_NEEDED: fCNT] —
Number of Dedicated Inputs 4 —
Number of Bidirectional I/O Pins 16 —
封裝 24-pin DIP (PI) ceramic through-hole Ceramic DIP-24 (windowed, Altera 'I' designation)
工作溫度範圍 Industrial (I suffix): -40C to +85C —
Supply Voltage (VCC) 5 V nominal —
Process Technology CMOS, UV-erasable —
Programmable Flip-Flop Modes D, T, JK, SR (per macrocell) —
Global Clock Pins 1 —
安裝類型 Through-Hole (DIP) Through-hole
Lead-Free / RoHS [DATA_NEEDED: RoHS] —
Original Manufacturer Altera (now Intel PSG; legacy stock from Rochester Electronics) —
Family — Altera Classic EP610
Maximum Propagation Delay (tPD) — 25 ns
Pipelined Data Rate (fMAX) — 100 MHz
Speed Grade — 25 (25 ns tPD)
Power Variant — L (low-power CMOS)
Temperature Grade — I (industrial)
Dedicated Inputs — 4
I/O Pins — 16
Technology — CMOS, UV-erasable (windowed)
Programming Method — Altera MAX+PLUS II / Classic compiler + compatible programmer
RoHS 狀態 — Unknown - ceramic DIP legacy package
Manufacturer / Source — Altera (original), Rochester Electronics (authorized continuing supplier)

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