EP910LC-30T vs EP910LI-30 比較
詳細並排比較 EP910LC-30T 由 Altera 與 EP910LI-30 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP910LI-30 - 24-Macrocell EPLD, 30ns, PQCC44 | Rochester/Altera
EP910LI-30 Obsolete規格比較
| 參數 | EP910LC-30T | EP910LI-30 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Part Number | EP910LC-30T | — |
| Manufacturer | Altera (Rochester Electronics) | — |
| Device Family | Classic EPLD | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | 30 ns |
| Maximum Operating Frequency | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V ±5% (4.75 V to 5.25 V) |
| Technology | CMOS, UV-erasable / OTP | — |
| User I/O Pins | 36 | — |
| 封裝 | 44-pin PLCC (J-lead) | 44-pin PQCC / PLCC-44 (J-lead) |
| 安裝類型 | Surface Mount | Surface Mount (socket recommended for UV erasure) |
| 工作溫度 | [DATA_NEEDED: operating temperature] | -40C to +85C (Industrial) |
| Programmable Pins | Bidirectional, tri-state | — |
| Programming Interface | Altera MAX+PLUS II | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance not verified in scraped data] |
| Lead-Free | unknown | [DATA_NEEDED: lead-free status] |
| Family | — | Altera Classic EPLD EP910 |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Equivalent Gates | — | 450 |
| Supply Current (ICC) | — | [DATA_NEEDED: ICC standby/active] |
| Process Technology | — | CMOS EPROM, UV-erasable |
| Dedicated Inputs | — | 10 |
| I/O Pins | — | 22 |
| Programming Method | — | Altera EPLD programming algorithm / MAX+PLUS II legacy support |
| Manufacturer (Original) | — | Altera (now Intel PSG) |
| Current Stocking Channel | — | Rochester Electronics (authorized aftermarket) |