EP910LC-35T vs EP910LC-30 比較
詳細並排比較 EP910LC-35T 由 Altera 與 EP910LC-30 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LC-35T | EP910LC-30 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Classic EPLD (EP910) | — |
| Logic Capacity | 450 usable gates | — |
| Macrocells | 24 | — |
| Propagation Delay (tPD) | 35 ns | 30 ns (max) |
| Maximum Operating Frequency | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V (nominal, TTL) |
| User I/O Pins | 36 | — |
| 封裝 | PLCC-44 (J-lead) | — |
| Process Technology | CMOS (EPROM-based) | CMOS (EPROM-based) |
| 工作溫度 | 0C to +70C (commercial) | — |
| Erasure Method | UV-erasable window (ceramic package) / OTP (plastic) | — |
| Programming | Altera programming hardware + MAX+PLUS II | — |
| 安裝類型 | Surface Mount (PLCC socket or solder) | — |
| MSL 等級 | MSL 3 (168 hours) | [DATA_NEEDED: MSL level] |
| RoHS 狀態 | [DATA_NEEDED: RoHS status not in verified data] | [DATA_NEEDED: RoHS status] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | — | 24 |
| Maximum Toggle Frequency | — | 62 MHz |
| Package Type | — | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| I/O Pin Count | — | 24 |
| Dedicated Input Pins | — | 36 (including I/O) |
| Product Terms per Macrocell | — | Up to 16 |
| Programming Technology | — | UV-erasable EPROM cell |
| Development Tool | — | Altera MAX+PLUS II |