EP910LC-40 vs EP910LI-15 比較
詳細並排比較 EP910LC-40 由 Rochester Electronics 與 EP910LI-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete規格比較
| 參數 | EP910LC-40 | EP910LI-15 |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Manufacturer | Rochester Electronics (Altera original) | — |
| Device Family | Altera Classic EPLD - EP910 | Altera Classic EPLD |
| Product Type | EPLD (Erasable Programmable Logic Device) | Programmable Logic Device (PLD) |
| Usable Gates | 450 | — |
| Macrocells | 24 | — |
| Logic Array Blocks | 2 (12 macrocells each) | — |
| Propagation Delay (tPD) | 40 ns | — |
| Maximum Toggle Frequency (fMAX) | 25 MHz | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | 12 |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Technology | CMOS EPROM | CMOS |
| 封裝 | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) | 44-terminal J-lead ceramic chip carrier (PQCC44) |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Programming Method | Altera Logic Programmer (PLAD-J), 4-wire serial | — |
| RoHS 狀態 | Not applicable (legacy) | unknown |
| Lead-Free Status | Not applicable | unknown |
| Part Number | — | EP910LI-15 |
| Supply Voltage Range | — | 4.5 V to 5.5 V |
| Input/Output Lines | — | 24 |
| Total User-Signal Resources | — | 36 |
| Speed Grade | — | 15 ns |
| 工作溫度範圍 | — | -40 °C to +85 °C |
| Package Pin Count | — | 44 terminals |
| Package Mounting | — | Surface Mount |
| Dielectric/Construction | — | Ceramic |
| REACH Status | — | unknown |
| AEC-Q100 Status | — | not_applicable |
| Halogen-Free Status | — | unknown |
| Conflict Minerals Status | — | unknown |