EP910LC30T vs EP910LC-35 比較
詳細並排比較 EP910LC30T 由 Intel 與 EP910LC-35 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LC30T | EP910LC-35 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Device Family | Altera Classic EPLD | — |
| Logic Capacity | 450 equivalent gates | — |
| Macrocells | 24 | 24 |
| Propagation Delay | 30 ns (tpd) | — |
| Maximum Frequency | 33.3 MHz | — |
| 供應電壓 | 5 V | — |
| Process Technology | CMOS (LC low-power variant) | — |
| Programmable Elements | UV-erasable EPROM | — |
| 封裝 | 44-pin PLCC (J-Lead), Tape and Reel | PLCC-44 (J-lead, LC suffix) |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| 安裝類型 | Surface Mount | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Not applicable (legacy product) |
| Programming Interface | Altera ByteBlaster-compatible | — |
| Manufacturer | Intel (formerly Altera); currently supplied by Rochester Electronics | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Classic (EP910) |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Technology | — | CMOS EPROM |
| 腳位數 | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |