EP910LC44-30T vs EP910LC44-40 比較
詳細並排比較 EP910LC44-30T 由 Altera 與 EP910LC44-40 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LC44-30T | EP910LC44-40 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | Classic EPLD | — |
| Logic Type | PAL-type CMOS EPLD (OT PLD) | — |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 33 ns | 40 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | 5 V (nominal) |
| Dedicated Inputs | 12 | 12 |
| I/O Lines | 24 (bidirectional) | — |
| Total Inputs | 36 | 36 |
| Total Outputs | 24 | — |
| External Clock Inputs | 2 | — |
| Programming Technology | CMOS, UV-erasable (windowed package in family) | — |
| Security Bit | Programmable (logic readback protection) | — |
| Operating Temperature Grade | Commercial | — |
| 封裝 | PQCC-44 (Plastic Leaded Chip Carrier, J-bend) | 44-pin PLCC (Plastic Leaded Chip Carrier) |
| Terminal Form | J-BEND | — |
| Package Code | QCCJ | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Family | — | Altera Classic EPLD |
| Product Terms (Total) | — | 240 |
| I/O Pins | — | 24 (bidirectional) |
| Global Clock Inputs | — | 2 |
| Technology | — | CMOS, UV-erasable EPROM |
| Logic Compatibility | — | TTL-compatible I/O |
| 工作溫度 | — | 0C to +70C (commercial) |
| Programming Method | — | JEDEC file via LP6/MP9 or compatible programmer |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS compliance] |