EP910LC44 vs EP910LI-15 比較

詳細並排比較 EP910LC44 由 Altera 與 EP910LI-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP910LC44 EP910LI-15
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 啟用中
Product Family Classic EPLD (EP910 Series) —
Manufacturer Altera Corporation (now Intel PSG) —
Device Type Erasable Programmable Logic Device (EPLD) —
Macrocells 24 —
Total Product Terms 240 —
Dedicated Inputs 12 12
I/O Pins 24 —
Total Input Pins 36 (12 dedicated + 24 I/O as inputs) —
Global Clock Inputs 2 —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Propagation Delay (LC grade) [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] —
Propagation Delay (LC-30 grade) 33 ns (per EP910LC44-30 verified data) —
Process Technology CMOS —
封裝 44-pin PLCC (J-leaded) 44-terminal J-lead ceramic chip carrier (PQCC44)
工作溫度 [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] —
Programming Method EPROM (erasable UV for ceramic; OTP for plastic PLCC) —
Architecture AND-OR sum-of-products with programmable macrocell feedback —
Logic Compatibility TTL-compatible CMOS I/O —
RoHS 狀態 [DATA_NEEDED: not stated in verified data] unknown
Product Type — Programmable Logic Device (PLD)
Device Family — Altera Classic EPLD
Part Number — EP910LI-15
Supply Voltage Range — 4.5 V to 5.5 V
Input/Output Lines — 24
Total User-Signal Resources — 36
Speed Grade — 15 ns
工作溫度範圍 — -40 °C to +85 °C
Technology — CMOS
Package Pin Count — 44 terminals
Package Mounting — Surface Mount
Dielectric/Construction — Ceramic
REACH Status — unknown
AEC-Q100 Status — not_applicable
Lead-Free Status — unknown
Halogen-Free Status — unknown
Conflict Minerals Status — unknown

資料表與資源

瀏覽所有產品 建立 BOM 索取報價