EP910LI-20 vs EP910LI-30 比較

詳細並排比較 EP910LI-20 由 Altera 與 EP910LI-30 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Rochester Electronics
EP910LI-30 EP910LI-30 - 24-Macrocell EPLD, 30ns, PQCC44 | Rochester/Altera

EP910LI-30 - 24-Macrocell EPLD, 30ns, PQCC44 | Rochester/Altera

EP910LI-30 Obsolete

規格比較

參數 EP910LI-20 EP910LI-30
品牌 Altera Rochester Electronics
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Altera Classic EPLD Altera Classic EPLD EP910
Macrocells 24 24
Maximum Operating Frequency 62 MHz —
Propagation Delay (tpd) 20 ns —
Dedicated Inputs 16 10
I/O Pins 24 22
Supply Voltage (VCC) 5 V 5 V ±5% (4.75 V to 5.25 V)
工作溫度 -40C to +85C (Industrial) -40C to +85C (Industrial)
封裝 40-pin Ceramic DIP (Windowed) 44-pin PQCC / PLCC-44 (J-lead)
Technology CMOS, UV-erasable —
Package Type Through-Hole, Ceramic DIP with Quartz Window —
Temperature Grade Industrial (-40C to +85C) —
腳位數 40 —
Logic Family EPLD (Erasable PLD) —
Architecture Sum-of-products macrocell —
Pin/Package Compatibility Pin-compatible across EP910 family —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance not verified in scraped data]
Device Type — Erasable Programmable Logic Device (EPLD)
Equivalent Gates — 450
Propagation Delay (tPD) — 30 ns
Supply Current (ICC) — [DATA_NEEDED: ICC standby/active]
Process Technology — CMOS EPROM, UV-erasable
安裝類型 — Surface Mount (socket recommended for UV erasure)
Programming Method — Altera EPLD programming algorithm / MAX+PLUS II legacy support
Lead-Free — [DATA_NEEDED: lead-free status]
Manufacturer (Original) — Altera (now Intel PSG)
Current Stocking Channel — Rochester Electronics (authorized aftermarket)

資料表與資源

瀏覽所有產品 建立 BOM 索取報價