EP910LI-30T vs EP910LI-35H 比較
詳細並排比較 EP910LI-30T 由 Altera 與 EP910LI-35H 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910LI-30T | EP910LI-35H |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Altera Classic EPLD | Altera Classic EPLD (EP910) |
| Number of Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 30 ns | — |
| Clock-to-Output (tCO) | [DATA_NEEDED: tCO] | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX] | — |
| Dedicated Inputs | 10 | — |
| I/O Pins | 24 | — |
| 封裝 | PQCC-44 (J-lead) | 44-pin PLCC (J-lead) |
| 工作溫度 | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Technology | CMOS, UV-erasable | CMOS, UV-erasable EPROM cell |
| 供應電壓 | [DATA_NEEDED: VCC] | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Programming Method | EPROM (UV-erasable) via Altera Logic Programmer | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS] | unknown |
| Lead-Free | [DATA_NEEDED: Lead-free] | — |
| Logic Capacity | — | 900 usable gates |
| Macro Cells | — | 24 |
| Speed Grade (tPD) | — | 35 ns |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |
| Supply Voltage (VCC) | — | 5 V (±10%) |
| Standby Current | — | [DATA_NEEDED: ICCSB] |
| Active Supply Current | — | [DATA_NEEDED: ICC] |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Lead-Free Option (H suffix) | — | Yes (H suffix) |