EP910LI-30T vs EP910LI-35T 比較

詳細並排比較 EP910LI-30T 由 Altera 與 EP910LI-35T 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP910LI-35T EP910LI-35T - 24-Macrocell Classic EPLD 35ns 44-PLCC | Intel

EP910LI-35T - 24-Macrocell Classic EPLD 35ns 44-PLCC | Intel

EP910LI-35T ⚠ 最後購買機會

規格比較

參數 EP910LI-30T EP910LI-35T
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Family Altera Classic EPLD Classic EPLD (EP910)
Number of Macrocells 24 —
Usable Gates 450 450
Propagation Delay (tPD) 30 ns 35 ns
Clock-to-Output (tCO) [DATA_NEEDED: tCO] —
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX] —
Dedicated Inputs 10 —
I/O Pins 24 —
封裝 PQCC-44 (J-lead) 44-pin PLCC (JEDEC)
工作溫度 -40C to +85C (Industrial) -40C to +85C (industrial, 'I' suffix)
Technology CMOS, UV-erasable CMOS, EPROM-based
供應電壓 [DATA_NEEDED: VCC] —
安裝類型 Surface Mount Surface Mount / Socket
Programming Method EPROM (UV-erasable) via Altera Logic Programmer EPROM (UV-erasable for windowed versions)
RoHS 狀態 [DATA_NEEDED: RoHS] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: Lead-free] [DATA_NEEDED: lead-free status]
Logic Elements — 24 macrocells
Maximum Toggle Frequency (fMAX) — 28.6 MHz
Supply Voltage (VCC) — 5 V (4.75 V to 5.25 V)
Data Retention — [DATA_NEEDED: data retention years]
Number of I/O Pins — [DATA_NEEDED: I/O pin count]

資料表與資源

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