EP910LI44 vs EP910LC44-40 比較

詳細並排比較 EP910LI44 由 Altera 與 EP910LC44-40 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP910LI44 EP910LC44-40
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family Classic EPLD Altera Classic EPLD
Architecture PAL-type, CMOS, One-Time-Programmable —
Macrocells 24 24
Package Type PLCC-44 (J-lead, surface mount) —
Total Pins 44 —
Dedicated Inputs 12 12
Bidirectional I/O 24 —
Maximum Logic Inputs 36 —
Maximum Outputs 24 —
Flip-Flops 24 —
External Clocks 2 —
Maximum Propagation Delay [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns] —
Supply Voltage (VCC) 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial) 5 V (nominal)
Operating Temperature (L grade) -40 °C to +85 °C (industrial) —
Technology CMOS CMOS, UV-erasable EPROM
Programmability UV-erasable (windowed) or OTP —
RoHS 狀態 non-compliant (original PLCC-44 lead finish) [DATA_NEEDED: RoHS compliance]
安裝類型 Surface Mount (PLCC socket compatible) Surface Mount
Programming Method Altera Logic Programmer card / Data I/O / third-party EPROM programmers JEDEC file via LP6/MP9 or compatible programmer
Product Terms (Total) — 240
I/O Pins — 24 (bidirectional)
Total Inputs — 36
Global Clock Inputs — 2
Propagation Delay (tPD) — 40 ns
Logic Compatibility — TTL-compatible I/O
封裝 — 44-pin PLCC (Plastic Leaded Chip Carrier)
工作溫度 — 0C to +70C (commercial)

資料表與資源

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