EP910PC-20T vs EP910PC-15 比較

詳細並排比較 EP910PC-20T 由 Altera 與 EP910PC-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP910PC-20T EP910PC-15
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Unknown Obsolete
Device Type EPLD —
Family Classic EPLD Altera Classic EPLD
Fabrication Technology CMOS —
Logic Integration 300 to 900 usable gates —
Logic Emulation 100% TTL emulation —
Application Function High-speed, low-power logic integration —
Programmable Device Class Erasable programmable logic device —
Device Family Altera Classic EPLD Family —
Speed Grade 20 ns —
Package Code PC —
Package Pin Count [DATA_NEEDED: package pin count] —
Package Dimensions [DATA_NEEDED: package dimensions] —
供應電壓 [DATA_NEEDED: operating supply voltage] —
工作溫度 [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
I/O Count [DATA_NEEDED: I/O count] —
Internal Logic Capacity 300 to 900 usable gates —
Supported Logic Integration Multiple PAL- and GAL-type devices —
Programming Interface [DATA_NEEDED: programming interface] —
Programming Voltage [DATA_NEEDED: programming voltage] —
Mounting Technology [DATA_NEEDED: mounting technology] —
RoHS 狀態 unknown [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS]
REACH Status unknown —
AEC-Q100 Qualification not_applicable —
Lead-Free Status unknown —
Halogen-Free Status unknown —
Usable Gates — 900
Macrocells — 24
Maximum Pin-to-Pin Delay (tpd) — 15 ns
Counter Frequency (fCNT) — 100 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Supply Current (Icc) — 80 mA typical
Dedicated Inputs — 10
Dedicated I/O Pins — 12
封裝 — 24-pin PDIP (PDIP-24, 0.300 inch)
安裝類型 — Through-Hole
Process Technology — CMOS, UV-erasable
Programming Method — Altera Logic Programmer card
MSL 等級 — Not applicable (through-hole)

資料表與資源

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