EP910PC-35 vs EP910PI-35 比較
詳細並排比較 EP910PC-35 由 Altera 與 EP910PI-35 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP910PI-35 - 24-Macrocell Classic EPLD, 35ns, PDIP-40 | Rochester/Altera
EP910PI-35 ✓ 啟用中規格比較
| 參數 | EP910PC-35 | EP910PI-35 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 啟用中 |
| Family | Classic EPLD | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 24 | — |
| I/O Pins | 24 | 24 bidirectional |
| Dedicated Inputs | 12 | 12 |
| Total Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 35 ns | 35 ns |
| Maximum Counter Frequency | 37 MHz | — |
| Internal Performance Frequency | 100 MHz | — |
| Technology | CMOS, UV-erasable/OTP | CMOS, UV-erasable EPROM |
| 供應電壓 | 5 V | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature grade] |
| 封裝 | 40-pin PDIP (Plastic DIP) | PDIP-40 (Plastic DIP, through-hole) |
| 安裝類型 | Through-Hole | — |
| Architecture | PAL-type sum-of-products, AND/OR array | — |
| Programming Method | UV-erase (ceramic) / OTP (plastic), A+PLUS / MAX+PLUS tools | Legacy Altera programming interface (pre-JTAG) |
| Compliance / RoHS | [DATA_NEEDED: RoHS status - legacy part] | — |
| Device Family | — | Altera Classic EPLD (EP910) |
| Logic Elements | — | 24 Macrocells |
| Usable Gates | — | 450 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Erasure Method | — | UV light (windowed variants) / One-time-programmable (this PI suffix) |
| RoHS 狀態 | — | unknown |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |