EP910PI-35 vs EP910PI-40 比較
詳細並排比較 EP910PI-35 由 Rochester Electronics 與 EP910PI-40 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP910PI-35 - 24-Macrocell Classic EPLD, 35ns, PDIP-40 | Rochester/Altera
EP910PI-35 ✓ 啟用中規格比較
| 參數 | EP910PI-35 | EP910PI-40 |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| Device Family | Altera Classic EPLD (EP910) | Classic EPLD |
| Logic Elements | 24 Macrocells | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 43 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 4.75 V to 5.25 V (5 V nominal) |
| Technology | CMOS, UV-erasable EPROM | — |
| I/O Pins | 24 bidirectional | — |
| Dedicated Inputs | 12 | — |
| 封裝 | PDIP-40 (Plastic DIP, through-hole) | PDIP-40 (Plastic DIP, 40-pin) |
| Programming Method | Legacy Altera programming interface (pre-JTAG) | UV-erase + Altera programmer (legacy) |
| 工作溫度 | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| Erasure Method | UV light (windowed variants) / One-time-programmable (this PI suffix) | — |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Part Number | — | EP910PI-40 |
| Architecture | — | PAL-type macrocell, CMOS, UV-erasable |
| Number of Macrocells | — | 24 |
| Number of Dedicated Inputs | — | 12 |
| Number of I/O Lines | — | 24 |
| External Clock Inputs | — | 2 |
| 最大時脈頻率 | — | 25 MHz |
| Speed Grade | — | -40 (43 ns) |
| 安裝類型 | — | Through-Hole |
| Process Technology | — | CMOS (UV-erasable) |
| Programmable Polarity | — | Yes (user-configurable output) |
| Output Enable Control | — | Yes (per-pin three-state) |