EPC1213LI20 vs EPC1213LC20 比較
詳細並排比較 EPC1213LI20 由 Intel 與 EPC1213LC20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1213LI20 | EPC1213LC20 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | Memory ICs | EEPROM |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | OTP Configuration PROM (non-volatile) | OTP Configuration PROM (Flash-based) |
| 記憶體容量 | 212 Kbit | 212 Kbit |
| 介面類型 | Serial (Altera active-serial configuration) | — |
| Supply Voltage (VCC) | 3.3 V / 5 V | — |
| I/O Voltage Tolerance | 3.3 V or 5 V | 3.3 V / 5.0 V |
| Programmability | OTP (one-time programmable) | One-Time Programmable (OTP) via IEEE 1149.1 JTAG |
| 封裝 | 20-PLCC (9x9 mm), J-lead | 20-PLCC (J-lead, 9x9 mm) |
| 腳位數 | 20 | — |
| 工作溫度 | -40C to +85C (industrial) | 0C to +70C (Commercial) |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Mode | Active Serial (AS) | — |
| Internal Oscillator | Yes (generates DCLK to FPGA) | — |
| Cascade Support | Yes (nCASC pin for multi-device chains) | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - legacy Altera part] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| 介面 | — | Serial (Altera FPGA configuration protocol) |
| Maximum Configuration Clock | — | 6 MHz |
| Supply Voltage (Core) | — | 5.0 V |
| In-System Programmability | — | Yes (5.0 V and 3.3 V ISP) |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Compression Support | — | Yes (FPGA decompresses bitstream during load) |
| Package Code | — | QCCJ |
| 安裝類型 | — | Surface Mount |