EPC1213LI20 vs EPC1441LC20N 比較
詳細並排比較 EPC1213LI20 由 Intel 與 EPC1441LC20N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1213LI20 | EPC1441LC20N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | OTP Configuration PROM (non-volatile) | OTP EPROM (One-Time Programmable) |
| 記憶體容量 | 212 Kbit | 440 Kbit |
| 介面類型 | Serial (Altera active-serial configuration) | — |
| Supply Voltage (VCC) | 3.3 V / 5 V | — |
| I/O Voltage Tolerance | 3.3 V or 5 V | — |
| Programmability | OTP (one-time programmable) | — |
| 封裝 | 20-PLCC (9x9 mm), J-lead | 20-PLCC (J-Lead, 9 x 9 mm) |
| 腳位數 | 20 | — |
| 工作溫度 | -40C to +85C (industrial) | 0 C to +70 C (commercial) |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Mode | Active Serial (AS) | — |
| Internal Oscillator | Yes (generates DCLK to FPGA) | — |
| Cascade Support | Yes (nCASC pin for multi-device chains) | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - legacy Altera part] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| 組織 | — | 55 K x 8 bit |
| 介面 | — | Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF) |
| Configuration Clock (DCLK) | — | 8 MHz maximum |
| Programming Interface | — | JTAG (IEEE 1149.1) / Altera Programming Unit |
| 供應電壓 | — | 3.3 V (typical) |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Cascadable | — | Yes (nCS daisy-chain) |
| 安裝類型 | — | Surface Mount (PLCC socket compatible) |