EPC1213PC8 vs EPC1213LI20 比較
詳細並排比較 EPC1213PC8 由 Altera 與 EPC1213LI20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC1213PC8 | EPC1213LI20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | OTP Configuration PROM (EEPROM cell) | OTP Configuration PROM (non-volatile) |
| 記憶體容量 | 212 Kbit | 212 Kbit |
| 介面 | Serial (4-wire: nCS, DCLK, DATA, OE) | — |
| Configuration Mode Supported | FLEX/APEX FPP / PS serial | — |
| 最大時脈頻率 | 6 MHz | — |
| 供應電壓 | 3.0 V to 3.6 V | — |
| Programmability | One-Time Programmable (OTP) | OTP (one-time programmable) |
| Programming Standard | IEEE Std 1532 / Jam STAPL | — |
| Standby Current | < 50 µA typical | — |
| 工作溫度 | 0 °C to +70 °C (Commercial) | -40C to +85C (industrial) |
| 封裝 | 8-Pin PDIP (R-PDIP-T8) | 20-PLCC (9x9 mm), J-lead |
| 安裝類型 | Through-Hole | — |
| 腳位數 | 8 | 20 |
| RoHS 狀態 | Compliant (post-lead-free Altera revision) | [DATA_NEEDED: RoHS status - legacy Altera part] |
| Lead-Free | Yes | [DATA_NEEDED: lead-free status] |
| JEDEC Package Code | R-PDIP-T8 | — |
| 介面類型 | — | Serial (Altera active-serial configuration) |
| Supply Voltage (VCC) | — | 3.3 V / 5 V |
| I/O Voltage Tolerance | — | 3.3 V or 5 V |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Mode | — | Active Serial (AS) |
| Internal Oscillator | — | Yes (generates DCLK to FPGA) |
| Cascade Support | — | Yes (nCASC pin for multi-device chains) |
| MSL 等級 | — | [DATA_NEEDED: MSL level] |