EPC1441LI20 vs EPC1441LC20N 比較

詳細並排比較 EPC1441LI20 由 Intel 與 EPC1441LC20N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC1441LI20 EPC1441LC20N
品牌 Intel Intel
類別 Memory ICs Memory ICs
生命週期狀態 Obsolete Obsolete
記憶體類型 OTP Configuration PROM (PROM) OTP EPROM (One-Time Programmable)
Density 441 kbits (440,800 bits) —
Number of Words 440,800 —
Bits per Word 1 bit —
Configuration Interface Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) —
Supported FPGA Families ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
供應電壓 3.3 V 3.3 V (typical)
工作溫度 -40 C to +85 C (industrial) 0 C to +70 C (commercial)
封裝 20-pin PLCC (J-lead, 9x9 mm) 20-PLCC (J-Lead, 9 x 9 mm)
Pin Pitch 1.27 mm —
Programming Method One-Time-Programmable via Altera programming hardware —
MSL 等級 [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Configuration Time Depends on FPGA bitstream length and DCLK frequency —
記憶體容量 — 440 Kbit
組織 — 55 K x 8 bit
介面 — Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF)
Configuration Clock (DCLK) — 8 MHz maximum
Programming Interface — JTAG (IEEE 1149.1) / Altera Programming Unit
Cascadable — Yes (nCS daisy-chain)
安裝類型 — Surface Mount (PLCC socket compatible)

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