EPC1441TI32N vs EPC1441LC20N 比較

詳細並排比較 EPC1441TI32N 由 Intel 與 EPC1441LC20N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC1441TI32N EPC1441LC20N
品牌 Intel Intel
類別 Memory ICs Memory ICs
生命週期狀態 啟用中 Obsolete
記憶體類型 OTP Configuration PROM (serial) OTP EPROM (One-Time Programmable)
Memory Density 440 kbit (440,800 bits) —
Number of Words 440,800 words —
Bits per Word 1 bit —
Memory Technology EPROM (one-time programmable) —
供應電壓 3.3 V 3.3 V (typical)
介面類型 Altera passive-serial (FPGA configuration) —
Programming Interface IEEE 1149.1 (JTAG) - 5 V and 3.3 V ISP JTAG (IEEE 1149.1) / Altera Programming Unit
Max Serial Clock 10 MHz (per datasheet.com) / 8 MHz (per Mouser listing) —
Package Type TQFP-32 (plastic, 7x7 mm) —
安裝類型 Surface Mount Surface Mount (PLCC socket compatible)
Operating Temperature Grade Industrial —
腳位數 32 —
RoHS 狀態 Compliant [DATA_NEEDED: RoHS status]
Lead-Free Yes [DATA_NEEDED: lead-free status]
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
記憶體容量 — 440 Kbit
組織 — 55 K x 8 bit
介面 — Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF)
Configuration Clock (DCLK) — 8 MHz maximum
封裝 — 20-PLCC (J-Lead, 9 x 9 mm)
工作溫度 — 0 C to +70 C (commercial)
Cascadable — Yes (nCS daisy-chain)
MSL 等級 — [DATA_NEEDED: MSL level]

資料表與資源

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