EPC16JC88 vs EPC16QC100DM 比較

詳細並排比較 EPC16JC88 由 Altera 與 EPC16QC100DM 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC16JC88 EPC16QC100DM
品牌 Altera Intel
類別 Memory ICs Memory ICs
生命週期狀態 NRND NRND
Manufacturer Altera (now Intel FPGA) —
Family Enhanced Configuration Device (EPC4 / EPC8 / EPC16) —
Device Function In-system programmable configuration PROM for SRAM-based FPGAs —
Density 16 Mbit —
Programmability In-system programmable via IEEE 1149.1 JTAG —
Configuration Interface Altera/Intel serial configuration (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) Serial (SPI-compatible, Altera FPP mode)
封裝 88-ball UBGA (11 x 8 mm), JEDEC designation C88 100-pin PQFP (QFPA)
Operating Temperature Grade Industrial (J suffix) —
供應電壓 [DATA_NEEDED: VCC operating range] —
Supported FPGA Families Altera/Intel Stratix, Cyclone, APEX, Arria (via configuration interface) —
Configuration Clock Driven by target FPGA during configuration —
Programming Interface JTAG (IEEE 1149.1) 4-wire TCK/TMS/TDI/TDO —
Multi-Device Configuration Supports daisy-chain configuration of multiple FPGAs —
濕度敏感等級 (MSL) [DATA_NEEDED: MSL rating per JEDEC J-STD-020] —
RoHS 狀態 [DATA_NEEDED: RoHS compliance declaration] —
Lead-Free [DATA_NEEDED: lead-free finish] —
無鹵素 [DATA_NEEDED: halogen-free status] —
記憶體類型 — Non-volatile Configuration PROM (NOR flash)
Memory Density — 16 Mbit (2 Mbyte)
Core Supply Voltage (VCC) — 3.0 V to 3.6 V
I/O Voltage (VIO) — 2.5 V / 3.3 V selectable
Output Voltage (VPP) — 1.8 V / 2.5 V / 3.3 V selectable
Maximum DCLK Frequency — 40 MHz
Cascadable — Yes (multi-device daisy chain via nCASC)
In-System Programming — Yes (IEEE 1532 / JTAG)
Program/Erase Cycles — [DATA_NEEDED: program/erase cycle endurance]
Data Retention — [DATA_NEEDED: data retention years]
工作溫度範圍 — -40 C to +85 C (industrial)
Package Code — Q100 + DM suffix
Lead-Free / RoHS — [DATA_NEEDED: lead-free status]
Compatible FPGA Families — Stratix, Cyclone, APEX, ACEX
MSL 等級 — [DATA_NEEDED: MSL rating]

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