EPC16QI100 vs EPC16Q100 比較
詳細並排比較 EPC16QI100 由 Altera 與 EPC16Q100 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC16QI100 | EPC16Q100 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體容量 | 16 Mb (1048576 words) | 16 Mb |
| Programmable Type | In System Programmable (ISP) | — |
| 供應電壓 | 3.3 V (core and I/O) | 3.3 V |
| 工作電源電壓 | 3.0 V to 3.6 V | — |
| Configuration Clock Frequency | 33 MHz | — |
| 介面 | Serial | — |
| 封裝 | 100-PQFP (20 x 14 mm) | 100-pin PQFP (20 x 14 mm) |
| 腳位數 | 100 | — |
| 工作溫度 | -40 °C to +85 °C (Industrial) | -40C to +85C (industrial) |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| IEEE 1532 ISP Compliance | Yes | — |
| Jam STAPL Support | Yes | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Temperature Grade | Industrial | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free version) |
| 記憶體類型 | — | Flash Configuration PROM |
| Programmability | — | In-system programmable via JTAG (IEEE 1149.1) |
| Configuration Interface | — | Serial/parallel Altera FPGA configuration protocol |
| I/O Voltage Tolerance | — | 3.3 V and 5 V tolerant |
| Write Protection | — | Hardware write protection pin |
| Configuration Clock | — | Dedicated DCLK output to FPGA |
| Compression Support | — | On-chip controller supports bitstream compression |
| JTAG Chain Support | — | Yes (multi-device chain capable) |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Family | — | Altera Enhanced Configuration Device (EPC4/EPC8/EPC16) |