EPC16QI100N vs EPC16UC80 比較
詳細並排比較 EPC16QI100N 由 Altera 與 EPC16UC80 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC16QI100N | EPC16UC80 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | NRND | 最後購買 |
| 記憶體容量 | 16 Mb | — |
| 記憶體類型 | Flash (in-system programmable) | — |
| Programmable Type | In System Programmable | — |
| Configuration Interface | Serial | — |
| Maximum Configuration Clock | 33 MHz | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V | — |
| 工作溫度 | -40C to +85C | -40 C to +85 C (industrial) |
| 封裝 / 外殼 | 100-PQFP (20 x 14 mm) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Number of Terminals | 100 | — |
| Package Style | Flatpack / PQFP | — |
| Family Name | EPC16 | — |
| Application | FPGA configuration memory | — |
| RoHS 狀態 | Compliant | — |
| Reprogrammability | Yes, in-system (IEEE 1532) | — |
| Memory Density | — | 16 Mbit |
| Device Family | — | EPC4 / EPC8 / EPC16 Enhanced Configuration Device |
| Configuration Memory Sections | — | 8 (multi-boot capable) |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (typical 3.3 V) |
| Configuration Clock (DCLK) | — | Up to 33 MHz (FPP mode) |
| Configuration Modes | — | FPP, PS, JTAG |
| 介面 | — | Parallel data + DCLK + nSTATUS + nCONFIG + CONFIG_DONE |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Endurance | — | 100,000 erase/program cycles (per datasheet) |
| 封裝 | — | 80-ball UBGA (Ultra FineLine BGA), 11x8 mm |
| Supported Target FPGAs | — | Stratix/II/III/GX, Cyclone/II/III, APEX 20K/II/IIE, Mercury |
| Lead-Free / RoHS | — | Compliant per Altera product page |
| Multi-Device Daisy-Chain | — | Yes |